(load "digital-circuits.txt")

; As, Bs wires for binary numbers to add.
; Ss - wires for sum
; C - wire for carry
; Highest order bits first
(define (ripple-carry-adder As Bs Ss C)
  (if (null? As)
      'ok
      (let ((C-in (make-wire)))
        (full-adder (car As) (car Bs) C-in (car Ss) C)
        (ripple-carry-adder (cdr As) (cdr Bs) (cdr Ss) C-in))))

; half-adder-delay = and-gate-delay +
;   max(or-gate-delay, and-gate-delay + inverter-delay)
; full-adder-delay = 2*half-adder-delay + or-gate-delay
; n-bit-ripple-carry-adder-delay = n * full-adder-delay

(define (test a b)
  (define (wire-with-signal signal)
    (let ((wire (make-wire)))
      (set-signal! wire signal)
      wire))
  (let ((As (map wire-with-signal a))
        (Bs (map wire-with-signal b))
        (Ss (map (lambda(x) (make-wire)) a))
        (C (make-wire)))
    (ripple-carry-adder As Bs Ss C)
    (propagate)
    (list (list 'sum (map get-signal Ss))
          (list 'carry (get-signal C)))))

; 1 ]=> (test '(1 1 1 1 1) '(0 0 0 0 1))
; 
; ;Value: ((sum (0 0 0 0 0)) (carry 1))
; 
; 1 ]=> (test '(1 1 1 1 1) '(1 1 1 1 1))
; 
; ;Value: ((sum (1 1 1 1 0)) (carry 1))
; 
; 1 ]=> (test '(1 0 0 1 1) '(1 1 0 1 1))
; 
; ;Value: ((sum (0 1 1 1 0)) (carry 1))